The present invention relates generally to very large scale integrated (VLSI) circuit devices. In particular, the present invention provides a method, system, program product that implement a design object that automatically provides compliance with alternating phase shifted mask (altPSM) rules.
Alternating phase shift masks (altPSM) have found increased usage in lithography for semiconductor manufacture and elsewhere because they allow creation of smaller dimension features. Extensive use of altPSM with complex chip designs, however, has been limited by the complexity of the designs and the need to maintain compliance with altPSM design rules. One problem that arises during design layout using computer aided (CAD) technology is that phase shape regions of the same phase (referred to as “color”) may be laid out such that they overlap, e.g., overlapping of phase shape regions in the mask for adjacent lines. Since the phase shape regions have the same color, they conflict such that the improper optical interference occurs during generation of the desired feature. Accordingly, altPSM design rules mandate that conflicts between phase shape regions be avoided. As designs become more complex and features are laid out in an increasingly dense fashion, the likelihood that this type problem occurs is greatly increased.
One approach to address this layout problem has been to implement groundrules to avoid violation of altPSM design rules. This approach, however, leads to a number of other problems such as: performance optimization opportunities being unused, increased device size, etc.
Another approach to address the problem has been to implement phase-aware design methodologies that implement altPSM design rules, e.g., to avoid phase conflicts. In phase-aware design methodologies, the phase shape regions are added or identified in a design after layout using special programs that add/identify phase-shiftable features and address phase conflicts and other phase related design problems. See, for example, U.S. Pat. No. 6,057,063 to Liebmann et al. This approach, however, results in lengthy correction procedures. For example, referring to FIGS. 1 and 2, a conventional methodology for phase-aware design and application of the methodology to an illustrative shape are shown, respectively. In step (a), a layout 10 is designed, and repetitive design rule checking (DRC) is conducted to obtain a DRC-clean layout 12. In step (b), a phase-shiftable feature 14 is added/identified using custom programs. In step (c), the layout is analyzed to determine whether the layout is altPSM design rule compliant, e.g., whether one or more phase conflicts or other phase related problems 16 exist. In step (d), the layout is modified to achieve compliance if it is non-compliant, which may require return to step (c) and/or step (a). This process is repeated with each modification until the layout is ultimately altPSM design rule compliant. Since each modification requires re-analysis, this approach is both time consuming and processor laborious.
In view of the foregoing, there is a need in the art for a technique that solves the problems of the related art.